Substrate including selectively formed barrier layer

ABSTRACT

A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.

DOMESTIC PRIORITY

This application is a divisional of U.S. patent application Ser. No.14/288,840, filed May 28, 2014, the disclosure of which is incorporatedby reference herein in its entirety.

BACKGROUND

The present invention relates generally to semiconductor fabricationprocesses, and more specifically, to a method of selectively forming abarrier layer on a substrate.

Substrates including metallic electrical interconnects are typicallyformed using a wide variety of etching techniques to selectively formand locate targeted layers, such as barrier layers, on the substrate. Inmany cases, it is desirable to etch a targeted layer without damagingone or more layers formed beneath the targeted layer. Planarizationtechniques, such as a chemical-mechanical planarization (CMP) process,are typically used to remove one or more metal layers. The CMP process,however, provides poor metal selectivity and can inadvertently damagesoft polymeric dielectric films that are intended to be preserved.

Chemical etching techniques are also used to remove targeted layersformed on a semiconductor substrate. However, the effectiveness ofconventional chemical etching techniques is limited to the particularmaterial of the targeted layer. Chemical etching techniques also causeundesirable undercutting in the etched layers.

Laser etching techniques, such as ablative photodecomposition (APD), arebased on a concept that energy can be imparted to a substrate using alaser radiation to selectively ablate a targeted layer. Radiationabsorption occurs very rapidly and produces material fragments whicheject or “ablate” from the surface of the material, leaving behind alocalized etched region. Selectivity can be provided using a mask tolimit where laser radiation is applied to a targeted layer, or throughthe inclusion of features in the target layer which have differentablation thresholds. The manner in which material is removed by APD isrelated to the amount of laser radiation applied and properties of thefeatures including its vaporization temperature, radiation absorption,and thermal conductivity. This process can work in such a manner inwhich laser radiation sufficiently heats or shocks the metal due todiscontinuity of the interface, a specified feature or area such thatnearby features, with lower thresholds, experience APD, possibly in amanner which ejects the initially radiated feature.

SUMMARY

A method of selectively locating a barrier layer on a substrate includesforming a barrier layer on a surface of the substrate. The barrier layercomprises of a metal element and a non-metal element. The barrier layermay also be formed from a metal element and non-metal element. Themethod further includes forming an electrically conductive film layer onthe barrier layer, and forming a metallic portion in the electricallyconductive film layer. The method further includes selectively ablatingportions of the barrier layer from the dielectric layer to selectivelylocate place the barrier layer on the substrate.

According to another embodiment, a method of selectively locating abarrier layer on a substrate comprises forming a barrier layer on asurface of the substrate. The barrier layer is formed from a barriermaterial comprising a metal element and a non-metal element. The methodfurther includes forming an electrically conductive film layer in thebarrier layer. The method further includes forming a surface componenton the electrically conductive film layer, and selectively ablatingportions of at least one of the barrier layer and the conductive filmlayer from the dielectric layer.

Additional features are realized through the techniques of the presentinvention. Other embodiments are described in detail herein and areconsidered a part of the claimed invention. For a better understandingof the invention with the features, refer to the description and to thedrawings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The subject matter which is regarded as the invention is particularlypointed out and distinctly claimed in the claims at the conclusion ofthe specification. The forgoing features are apparent from the followingdetailed description taken in conjunction with the accompanyingdrawings. FIGS. 1-9E illustrate a method of selectively locating abarrier layer on a substrate according to an embodiment, in which:

FIG. 1 is a cross-sectional view of a starting substrate including aplurality of cavities formed in a dielectric layer;

FIG. 2 illustrates the substrate of FIG. 1 following deposition of abarrier layer that conforms to the inner surfaces of the cavities andthe upper surface of the dielectric layer;

FIG. 3 illustrates the substrate of FIG. 2 following deposition of aconductive film layer on the barrier layer;

FIG. 4 illustrates the substrate of FIG. 3 following deposition of ametal material that fills the cavities and covers the conductive filmlayer;

FIG. 5 illustrates the substrate of FIG. 4 following a planarizationprocess that planarizes the metal material and stops on the barrierlayer to form respective wiring regions;

FIG. 6 illustrates the substrate of FIG. 5 while undergoing a laserablation process that directs energy pulses to the substrate;

FIG. 7 illustrates the substrate of FIG. 6 showing portions of thebarrier layer ablating from the dielectric layer in response to theenergy pulses;

FIG. 8 illustrates the substrate of FIG. 7 having portions of thebarrier layer being removed from the dielectric layer located adjacentto preserved wiring regions; and

FIGS. 9A-9E illustrate the substrate of FIG. 8 following formation of anencapsulating layer that encapsulates the wiring regions according to anembodiment.

FIGS. 10-14E are a series of diagrams illustrating a process flow ofselectively locating a barrier layer on a substrate according to anotherembodiment, in which:

FIG. 10 illustrates is a cross-sectional view of a starting substrateincluding a barrier layer formed on a dielectric layer, a conductivefilm layer formed on the barrier layer, and a surface component formedon the conductive film layer;

FIG. 11A illustrates the substrate of FIG. 10 undergoing a laserablation process that directs energy pulses to the substrate accordingto a first embodiment;

FIGS. 11B-11C illustrate the substrate of FIG. 10 undergoing a laserablation process that directs energy pulses to the substrate accordingto a second embodiment;

FIG. 12 shows portions of the barrier layer and conductive film layerlocated adjacent to the metal element ablating from the dielectricmaterial in response to the energy pulses performed according to thefirst embodiment shown in FIGS. 11A;

FIG. 13 illustrates the substrate of FIG. 12 having portions of thebarrier layer removed from the dielectric layer located adjacent to apreserved surface component; and

FIGS. 14A-14E illustrate the substrate of FIG. 13 following formation ofan encapsulating layer that encapsulates the surface component accordingto an embodiment.

DETAILED DESCRIPTION

With reference now to FIG. 1, a starting substrate 100 is illustratedaccording to an exemplary embodiment. The starting substrate 100includes a dielectric layer 102 formed on an underlying layer 104. Thedielectric layer 102 may be photodefinable and comprised of an organicmaterial. Various polymer materials may be used to form the dielectriclayer 102 including, but not limited to, polyimide (PI),polybenzobisoxaxole (PBO), epoxy, bisbenzocyclobutene (BCB), and blendsthereof. According to at least one exemplary embodiment, one or morecontact pads 106 are disposed in the underlying layer 104. The contactpad 106 is formed from any suitable conducting material including, butnot limited to, copper, copper alloy, aluminum, etc. The contact pad 106is formed in or on the underlying layer 104 using one or moreconventional semiconductor processing techniques, such as, for example,photolithography and reactive ion etch (ME), chemical vapor deposition(CVD), plasma enhanced chemical vapor deposition (PECVD), and atomiclayer deposition (ALD). A plurality of cavities 108 are formed in thedielectric layer 102. The cavities are formed according to one or moredifferent patterns. At least one cavity 108 extends through dielectriclayer 102 to expose a portion of a corresponding contact pad 106.

Referring to FIG. 2, a barrier layer 110 is deposited on the dielectriclayer 102. The barrier layer 110 conforms to the inner surfaces of thecavities 108 and the upper surface of the dielectric layer 102.According to at least one embodiment, the barrier layer 110 isconfigured as an etch stop layer which is described in greater detailbelow. The barrier layer 110 may be formed from a barrier materialcomprising a metal element and a non-metal element. The barrier layer110 may also include a plurality of barrier layers to form a multi-layerbarrier layer. The barrier layer 110 has a thickness ranging, forexample, from approximately 500 angstroms (Å) to approximately 5000 Å.

The barrier layer 110 may also be formed from a barrier material havingan electrical conductivity that is substantially less than metal. It isappreciated that the electrical conductivity may also be ascertainedbased on the electrical resistivity of the material as understood by oneof ordinary skill in the art. The balance between the metal element(e.g. Ta) and the non-metal element (e.g. N) determines the electricalresistivity of the resulting barrier material. In this regard, a ratioof the metal element and the non-metal element may determine theelectrical resistivity of the barrier material. According to anembodiment, the ratio of the electrical resistivity between the metalelement and the non-metal element is, for example, 5 (metal element): 1(non-metal element), which forms a barrier layer 110 having anelectrical resistivity ranging, for example, from approximately 200micro-ohm*cm to approximately 400 micro-ohm*cm. In an embodiment, forexample, the metal element of the barrier layer 110 may have anelectrical resistivity of approximately 200 micro-ohm*cm. Theresistivity can be adjusted based on processing.

Turning to FIG. 3, an electrically conductive film layer 112 is formedon the barrier layer 110. The conductive film layer 112 conforms to theouter surface of the barrier layer 110 without completely filling thecavities 108. The conductive film layer 112 is formed from a metallicmaterial such as, for example, copper (Cu) and serves as a seed layerfor subsequent electroplating processes.

Referring to FIG. 4, an electrically conductive metal material 114 isdeposited on the conductive film layer 112. The metal material 114 fillsthe cavities 108 and covers an upper surface of the conductive filmlayer 112. The metal material is formed from various metals including,but not limited to, copper (Cu) and aluminum (Al).

Turning now to FIG. 5, the metal material 114 is planarized according toa planarization process such as, for example, a chemical-mechanicalplanarization (CMP) process. The planarization process planarizes themetal material 114 such that a metallic portion such as, for example,one or more wiring regions 116, is formed in a respective cavity 108.Slurries associated with the planarization process are selective to themetal material 114 and the material (e.g., TaN) of the barrier layer110. The planarization process, therefore, effectively preserves thebarrier layer 110 while recessing only a negligible amount of theconductive film layer 112. As described above, the barrier layer 110 isconfigured as an etch stop layer. In this regard, the planarizationprocess planarizes the metal material 114 and a portion of theconductive film layer 112, while stopping on the barrier layer 110.Accordingly, the upper surfaces of the wiring regions 116 and theconductive film layer 112 are each formed flush with the upper surfaceof the barrier layer 110. The wiring regions 116 have a thickness thatis greater than the thickness of the barrier layer 110. For example, thethickness of the wiring regions 116 ranges from approximately 0.5 um toapproximately 10 um.

Referring to FIG. 6, a laser ablation process is performed, whichdirects energy pulses 117, e.g., ultra violet (UV) radiation pulses, tothe substrate 100. The energy pulses 117 have fluences ranging from, forexample, approximately 0.1 joules (J) per centimeter squared (cm²) toapproximately 2.0 J/cm². The energy pulses 117 have a wavelengthranging, for example, from approximately 126 nanometers (nm) toapproximately 351 nm, and a pulse duration ranging, for example, fromapproximately 15 nanoseconds (ns) to approximately 35 ns. Variouscommercially available laser ablation tools may be used to generate theenergy pulses 117. The energy pulses 117 are absorbed by the barrierlayer 110 and the wiring regions 116. According to at least oneembodiment, the laser beam can be controlled using an in-plane mask toreduce or prevent applying the energy pulses to critical structures suchas C4s or delicate structures such as memory repair fuses formed on thesubstrate 100.

The energy pulses 117 generate excitation and/or radiate (e.g., heat) inthe barrier layer 110. The higher thermal conductivity and materialthickness of the wiring regions 116 causes the wiring regions 116 toabsorb and dissipate the radiated energy, thereby preventing theablation of the wiring layers. However, the thin barrier layer 110quickly absorbs the radiated energy, and a combination of excitation andheat is generated due to the discontinuity of these two dissimilarmaterials. When the radiation excitation of the metal over thedielectric layer 102 exceeds a threshold, the barrier layer 110 isablated and removed from the dielectric layer 102. According to anembodiment, the wiring regions 116 and the conductive film layer 112 areformed and are disposed on a common insulating material. In this case,the wiring regions 116 more rapidly dissipate the radiated energy whencompared to the exposed dielectric layer 102 such that the underlyingdielectric material heats to different temperatures, respectively. Thatis, the temperature of the dielectric material may be heated todifferent temperatures based on the thickness differential between thewiring regions 116 and the conductive film layer 112. According to atleast one embodiment, the high energy pulse is applied while thesubstrate 100 is submerged under water. The use of water (or some othermedium that is transparent to UV energy) allows for improved coolingafter energy pulses are applied, while also eliminating the ejection ofmolten material back into the beam's path or onto the substrate 100.

Turning now to FIG. 7, portions of the barrier layer 110 ablate from thedielectric layer 102 in response to heat and/or molecular excitationtransferred between the material of the barrier layer 110 and thedielectric layer 102. However, the thickness differentials between thebarrier layer 110 and the wiring regions 116 cause different portions ofthe dielectric material 102 to reach different temperatures. Forexample, a first portion of the dielectric layer 102 located below thebarrier layer 110 and isolated from one or more wiring regions 116 isheated to a first temperature. However, a second portion of thedielectric layer 102 located proximate to a wiring region 116 is heatedto a second temperature that is less than the first temperature. As aresult, portions of the barrier layer 110 contacting portions of thedielectric material 102 that are heated to the temperature threshold areablated, while other portions of the dielectric material 102 that do notreach the temperature threshold are maintained. According to at leastone embodiment, portions of the barrier layer 110 that are isolated fromthe conductive film layer 112 formed on a respective wiring region 116,i.e., that do not directly contact the conductive film layer 112, areablated while portions of the barrier layer 110 that are proximate tothe conductive film layer 112, i.e., that contact or are very near tothe conductive film layer 12 formed on a respective wiring region, aremaintained.

The ablation process according to at least one exemplary embodiment ofthe disclosure contradicts conventional wisdom in that the traditionalablation processes requires a highly-conductive metal layer in order toabsorb the energy and induce ablation of the metal layer. At leastembodiment of the disclosure, however, achieves unexpected results inthat the barrier layer 110 is selectively ablated (i.e., removed) withrespect to the metal wiring regions 116 despite the barrier layer 110(e.g., TaN or TiN) having an electrical conductivity that issubstantially less than metal (e.g., Cu, Al, etc.) and having lowthermal conductivity.

Referring to FIG. 8, the substrate 100 is shown following the laserablation process. Portions of the barrier layer 110 located adjacent tothe wiring regions 116 are removed from the dielectric layer 102, whilethe wiring regions 116 are preserved. The ablated regions of the barrierlayer 110 form trenches 118 that expose the underlying dielectric layer102. Accordingly, portions of the barrier layer 110 are selectivelylocated at particular regions of the substrate 100 (e.g., between thedielectric layer 102 and the wiring regions 116), while targetedportions of the barrier layer 110 are selectively removed from thesurface of the dielectric layer 102 without damaging the wiring regions116 and/or the underlying dielectric layer 102. It is appreciated thatdebris collecting suction and/or subsequent washing process may beapplied to the surface of the substrate 100 to reduce and/or removedebris formed during the laser ablation process. The surface of thesubstrate 100 can also be ashed to improve the surface properties of theexposed dielectric layer 102 as understood by one of ordinary skill inthe art.

Accordingly, a barrier layer 110 formed from TaN, for example, whenexposed to laser radiation may be removed without aggressively attackingand damaging solder and/or wiring regions 116 formed on the substrate100.

According to at least one embodiment, the barrier layer 110 may includeone or more extension portions 120 that form an overcut which extendslaterally from barrier layer 110 and over the dielectric layer 102 asfurther illustrated in FIG. 8. In this regard, a damascene structure isformed which includes wiring regions 116 that are not coplanar (i.e.,not flush) with respect to the dielectric layer 102. Instead, the wiringregions 116 according to at least one embodiment illustrated in FIG. 8extend beyond the dielectric layer 102 by a height equal to or greaterthan the thickness of the barrier layer 110. From this point, substratefabrication processing as known in the art may continue.

According to an embodiment, an encapsulating layer 122 may be formed onthe upper surfaces of the barrier layer 110, the conductive film layer112, the wiring regions 116, and the trenches 118 corresponding to thedevice illustrated in FIG. 9E. An exemplary process to fabricate such adevice is illustrated in FIGS. 9A-9E.

The barrier layer 110 may be formed from a barrier material comprising ametal element and a non-metal element. The barrier layer 110 may alsoinclude a plurality of barrier layers to form a multi-layer barrierlayer. The barrier layer 110 has a thickness ranging, for example, fromapproximately 500 angstroms (Å) to approximately 5000 Å.

The barrier layer 110 may also be formed from a barrier material (e.g.,TaN) having an electrical conductivity that is substantially less thanmetal (e.g., Cu, Al, etc.). It is appreciated that the electricalconductivity may also be ascertained based on the electrical resistivityof the material as understood by one of ordinary skill in the art. Thebalance between the metal element (e.g. Ta) and the non-metal element(e.g. N) determines an electrical resistivity of the resulting barriermaterial. In this regard, a ratio of the metal element and the non-metalelement may determine the electrical resistivity of the barriermaterial. According to an embodiment, the ratio of the electricalresistivity between the metal element and the non-metal element is, forexample, 5 (metal element): 1 (non-metal element), which provides aforms a barrier layer 110 having an electrical resistivity ranging, forexample, from approximately 200 micro-ohm*cm to approximately 400micro-ohm*cm. Unlike pure metal (e.g., copper) that typically has anelectrical resistivity of approximately 10 micro-ohm*cm or less, atleast one non-limiting embodiment includes a barrier material layer 110having an electrical resistivity of no less than no less than about 50micro-ohm*cm. In an embodiment, for example, the metal element of thebarrier layer 110 may have an electrical resistivity of approximately200 micro-ohm*cm. The resistivity can be adjusted based on processing.

The metal material such as, for example, Cu, is encapsulated by the TaNencapsulating layer 122 as illustrated in FIG. 9B. Thereafter, a laserprocess may be re-applied to the substrate 100 such that the trenches118 are re-opened as illustrated in FIGS. 9C-9D. The encapsulating layer122 may be formed according to, for example, a sputtering process.Accordingly, the encapsulating layer 122 forms a barrier layer thatencapsulates the wiring regions 116. In this regard, the encapsulatinglayer 122 provides increased adhesion to organic material that may besubsequently formed on the substrate 100.

Turing now to FIGS. 10-14E, a series of diagrams illustrate a processflow for selectively locating a barrier layer on a substrate accordingto another embodiment. With reference to FIG. 10, a starting substrate200 includes a dielectric layer 202, a barrier layer 204 formed on thedielectric layer 202, a conductive film layer 206 formed on the barrierlayer 204, and a surface component 208 formed on the conductive filmlayer 206.

The dielectric layer 202 may be photodefinable and comprises an organicmaterial. Various polymer materials may be used to form the dielectriclayer 202 including, but not limited to, polyimide (PI),polybenzobisoxaxole (PBO), epoxy, bisbenzocyclobutene (BCB), and blendsthereof

The barrier layer 204 may be formed from a barrier material comprising ametal element and a non-metal element. The barrier layer 204 may alsoinclude a plurality of barrier layers to form a multi-layer barrierlayer. The barrier layer 204 has a thickness ranging, for example, fromapproximately 500 angstroms (Å) to approximately 5000 Å.

The barrier layer 204 may also be formed from a barrier material havingan electrical conductivity that is substantially less than metal (e.g.,Cu, Al, etc.). It is appreciated that the electrical conductivity mayalso be ascertained based on the electrical resistivity of the materialas understood by one of ordinary skill in the art. The balance betweenthe metal element (e.g. Ta) and the non-metal element (e.g. N)determines an electrical resistivity of the resulting barrier material.In this regard, a ratio of the metal element and the non-metal elementmay determine the electrical resistivity of the barrier material.According to an embodiment, the ratio of the electrical resistivitybetween the metal element and the non-metal element is, for example, 5(metal element): 1 (non-metal element), which provides a forms a barrierlayer 204 having an electrical resistivity ranging, for example, fromapproximately 200 micro-ohm*cm to approximately 400 micro-ohm*cm. Unlikepure metal (e.g., copper) that typically has an electrical resistivityof approximately 10 micro-ohm*cm or less, at least one non-limitingembodiment includes a barrier material layer 204 having an electricalresistivity of no less than no less than about 50 micro-ohm*cm. In anembodiment, for example, the metal element of the barrier layer 204 mayhave an electrical resistivity of approximately 200 micro-ohm*cm. Theelectrical resistivity can be adjusted based on processing.

According to at least one embodiment, the barrier layer 204 may alsoinclude a plurality of barrier layers to form a multi-layer barrierlayer, and is configured as an electromigration layer (i.e., seed layer)that allows a metal material such as, for example, a metal surfacecomponent 208, to be grown therefrom using, for example, anelectroplating process as understood by one of ordinary skill in theart. The conductive film layer 206 formed on the upper surface of thebarrier layer 204 using, for example, a sputtering process as understoodby one of ordinary skill in the art. The conductive film layer 206 maybe formed from, for example, Cu.

The surface component 208 includes, for example, a metal C4 elementformed from Cu. Although not illustrated, it is appreciated that avariety of structures, such as interconnect structures, may exist belowthe surface component 208. The interconnect structures provideelectrical connections between the surface component 208 and one or moreembedded connection elements such as contact pads or terminals.According to other embodiments of the disclosure, the surface component208 includes organic structures, polymeric structures, dielectricstructures, and non-organic structures. The thickness of the surfacecomponent 208 is greater than the thickness of the barrier layer 204and/or the conductive film layer 206. In the case of organic and/orpolymeric dielectric materials, when exposed to an energy pulse thesematerials will partially etch or will remain unaffected when exposed toan energy pulse if the structure is capped by a sufficiently thickprotective layer.

Turning to FIG. 11A, a laser ablation process is performed, whichdirects energy pulses 209, e.g., ultra violet radiation (UV) pulses, tothe substrate 200. The energy pulses 209 have fluences ranging from, forexample, approximately 0.1 joules (J) per second centimeter (cm²) toapproximately 2.0 J/cm². The energy pulses 209 have a wavelengthranging, for example, from approximately 126 nanometers (nm) toapproximately 351 (nm), and a pulse duration ranging, for example, fromapproximately 15 nanoseconds (ns) to approximately 35 ns. Variouscommercially available laser ablation tools may be used to generate theenergy pulses 209.

The energy pulses 209 heat and/or excite the surface component 208,conductive film layer 206, and the barrier layer 204. The conductivefilm layer 206 and barrier layer 204 is selectively ablated from thedielectric layer 202 based on a localized excitation that occurs betweenthe dielectric layer 202 and the conductive film 206 and barrier layer204 stack. The larger mass of the surface component 208 allows for alarger amount of radiant energy dissipation, thereby shielding theunderlying dielectric layer 202 from reaching a threshold process toinduce ablation. A first portion of the dielectric layer 202 locatedproximate to and/or below a respective surface component 208 is heatedto a first temperature. A second portion of the dielectric layer 202located below a portion of the barrier layer 204 that is isolated fromthe surface component 208 is heated to a second temperature that isgreater than the first temperature.

Although FIG. 11A illustrates applying the laser ablation processsimultaneously to both the conductive film layer 206 and the barrierlayer 204, another embodiment illustrated in FIGS. 11B-11C removes theconductive film layer 206 before performing the laser ablation process.More specifically, a first etching process 207, such as a wet etchprocess for example, is applied to the conductive film layer 206 asillustrated in FIG. 11B. The wet etching process 207 selectively removesthe conductive film layer 206 while maintaining the underlying barrierlayer 204. Following the wet etch process 207, the laser ablationprocess is applied to the remaining barrier layer 204 as illustrated in11C. Accordingly, the level of energy required to remove the barrierlayer 204 is reduced since the amount of material (i.e., the barrierlayer 204) has a reduced thickness as compared to the thickness definedby the combination of the barrier layer 204 and the conductive filmlayer 206. According to at least one embodiment, the beam of energypulses 209 can be controlled using an in-plane mask to reduce or preventapplying the energy pulses to structures such as C4s or delicatestructures such as memory repair fuses formed on the substrate 200.

Turning now to FIG. 12, portions of the barrier layer 204 and theconductive film layer 206 ablate from the dielectric layer 202 inresponse to radiated energy and discontinuality between the barrierlayer 204 and dielectric layer 202. The reaction occurs in response tothe radiated energy and discontinuality between the barrier layer 204and underlying dielectric layer 202. It is appreciated that if theconductive film layer 206 is formed on the barrier layer 204, theconductive film layer 206 is ablated along with the barrier layer 204.Although FIG. 12 illustrates portions of the barrier layer 204 and theconductive film layer 206 being ablated at locations extending betweenends of the substrate 200 and the surface component 208, anotherembodiment allows for the barrier layer 204 and the conductive filmlayer 206 to ablate at a middle portion such that openings are formed aselectrical viaducts. According to at least one embodiment, high energypulses are applied while the substrate 200 is submerged under water. Theuse of water (or another medium that is transparent to UV energy) allowsfor improved cooling after energy pulses are applied, while alsoeliminating the ejection of debris and molten material back into thebeam's path or onto the substrate 200.

The ablation result according to at least one exemplary embodiment ofthe disclosure illustrated in FIG. 12 contradicts conventional wisdom inthat the traditional ablation processes requires a materials having highthermal conductivity (e.g., Cu) in order to absorb the energy and induceablation of the metal layer. At least one embodiment of the disclosure,however, achieves unexpected results in that both the conductive filmlayer 206 and the barrier layer 204 are selectively ablated with respectto the surface component 208 despite the barrier layer 204 (, e.g., TaNor TiN) having an electrical conductivity and a thermal conductivitythat is substantially less than metal (e.g., Cu, Al, etc.). Accordingly,a barrier layer 204 formed from TaN, for example, may be removed withoutaggressively attacking and damaging solder and/or metal surfacecomponents 208 formed on the substrate 200.

Referring to FIG. 13, the substrate 200 is shown following the laserablation process. Portions of the barrier layer 204 located adjacent tothe surface component 208 are removed from the dielectric layer 202,while the surface component 208 is preserved. Accordingly, portions ofthe barrier layer 204 are selectively located at particular regions ofthe substrate 200 (e.g., between the dielectric layer 202 and thesurface component 208), while targeted portions of the barrier layer 204are selectively removed from the surface of the dielectric layer 202without damaging the surface component 208 and/or the underlyingdielectric layer 202. It is appreciated that debris collecting suctionand/or subsequent washing process is applied to the surface of thesubstrate 200 to reduce and/or remove debris formed during the laserablation process. The surface of the substrate 200 can also be ashed andor wet cleaned to improve the surface properties of the exposeddielectric layer 202 as understood by one of ordinary skill in the art.From this point, substrate fabrication processing as known in the artmay continue.

According to at least one embodiment, there is no undercutting betweenthe surface component 208 and either the conductive film layer 206 orthe barrier layer 204. As illustrated in FIG. 13, for example, theconductive film layer 206 and/or the barrier layer 204 may include anextension region 210 that extends laterally beyond the base of thesurface component 208 such that no undercutting exists.

According to an embodiment, a non-metal encapsulating layer 212 may beformed on the upper surfaces of the dielectric layer 202, the extensionregions 210 comprised of the barrier layer 204 and conductive film layer206, and the surface component 208 corresponding to the device shown inFIG. 14A. The encapsulating layer 212 may be formed from, for example,TaN. In this regard, a surface component 208 formed from a metalmaterial such as, for example, Cu, is encapsulated by the TaNencapsulating layer 212 as illustrated in FIGS. 14B. Thereafter, a laserprocess may be re-applied to the substrate 200 such that the dielectriclayer 202 is re-opened as illustrated in FIGS. 14C-14D. Theencapsulating layer 212 may be formed according to, for example, asputtering process. Accordingly, the encapsulating layer 212 forms abarrier layer that encapsulates the surface component 208 as illustratedin FIG. 14E. The encapsulating layer 212 has increased adhesion toorganic material that may be subsequently formed on the substrate 200.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the invention. Asused herein, the singular forms “a”, “an” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprises”and/or “comprising,” when used in this specification, specify thepresence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of onemore other features, integers, steps, operations, element components,and/or groups thereof.

The corresponding structures, materials, acts, and equivalents of allmeans or step plus function elements in the claims below are intended toinclude any structure, material, or act for performing the function incombination with other claimed elements as specifically claimed. Thedescription of the present invention has been presented for purposes ofillustration and description, but is not intended to be exhaustive orlimited to the invention in the form disclosed. Many modifications andvariations will be apparent to those of ordinary skill in the artwithout departing from the scope and spirit of the invention. Theembodiment was chosen and described in order to best explain theprinciples of the inventive teachings and the practical application, andto enable others of ordinary skill in the art to understand theinvention for various embodiments with various modifications as aresuited to the particular use contemplated.

The flow diagrams depicted herein are just one example. There may bemany variations to this diagram or the operations described thereinwithout departing from the spirit of the invention. For instance, theoperations may be performed in a differing order or operations may beadded, deleted or modified. All of these variations are considered apart of the claimed invention.

While various embodiments have been described, it will be understoodthat those skilled in the art, both now and in the future, may makevarious modifications which fall within the scope of the claims whichfollow. These claims should be construed to maintain the properprotection for the invention first described.

What is claimed is:
 1. A method of selectively locating a barrier layeron a substrate, the method comprising: forming a dielectric layer on asurface of the substrate, and forming a barrier layer on an uppersurface of the dielectric layer, the barrier layer comprising a metalelement and a non-metal element; forming an electrically conductive filmlayer on the barrier layer; forming a surface component on theelectrically conductive film layer; performing a first etching processthat removes the conductive film layer with respect to the barrierlayer; and after performing the first etching process, performing aselective laser ablation process to selectively ablate the barrier layerwith respect to the dielectric layer, the selective laser ablationprocess including selectively radiating a first portion of thedielectric layer to a first temperature while radiating a second portionof the dielectric layer to a second temperature less than the firsttemperature based on a thickness of a surface component and a thicknessof the barrier layer, wherein the surface component has a firstthickness and the barrier layer has a second thickness less than thefirst thickness.